BCON for LVDS Hardware Design Guide

This topic provides recommendations for designing your hardware to work with the Basler BCON for LVDS interface.

Identifiers such as X1, XCLK, CC0, or I2C_SDC refer to the pin names given in your camera model topic.

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Data Transmission (X0, X1, X2, X3, XCLK)

BCON for LVDS uses four data lanes (X0 through X3) and one clock line (XCLK) to transmit image data from the camera to the image processing unit.

During data transmission, signal reflections can be a major cause of bit errors. Every signal change in the transmitter launches a wave that travels to the receiver. If the termination resistor at the other end of the trace matches the impedance of the differential trace, it consumes most of the energy of the wave.

Therefore, both the differential traces and the termination resistors must have an impedance of 100 ohm. If they do not match the target impedance, the reflected wave can disturb the original signal and cause bit errors.

Design Recommendations for Data Transmission

Printed Circuit Board (PCB)

Flexible Flat Cable (FFC)

FFC Connector

Trigger and General Purpose Input (CC0)

The LVDS input line can be used to send a trigger signal to the camera. Although the trigger frequency is very moderate, make sure to observe the LVDS design rules to avoid noise being picked up. Noise can cause false trigger events.

In addition, the LVDS input can be used as a general purpose input. The state of the input can be read via the camera’s control interface at any time.

The input does not need a termination resistor. The line is terminated at camera side.

In other respects, the same recommendations as for the data output lines apply.

I²C Configuration Interface (I2C_SDA, I2C_SCL, I2C_ID)

Basler dart BCON for LVDS cameras use the I²C interface to exchange configuration data with the controlling processor.

I²C is an open-collector bus interface with two signal lines, SDA and SCL. Connect these signal lines to the appropriate ports of an I²C controller. Typically, an I²C controller is part of the microcontroller or the System on a Chip (SoC) that you will be using to process the image data.

For more information about I²C, see the I²C-Bus Specification and User Manual.

Notice

Voltage outside of the specified range can cause damage.

You must supply camera power that complies with the individual voltage requirements of the BCON for LVDS interface lines:

The nominal voltage for the power supply line (VCC) is 5 VDC.

The nominal voltage for the I²C interface lines (I2C_SCL, I2C_SDA, I2C_ID) is 3.3 VDC.

Design Recommendations for the I²C Interface

Power Supply (GND, VCC)

The camera needs a single 5 VDC power supply. Bad power quality can deteriorate the camera's image quality. However, a properly designed switched-mode power supply, as used to supply a USB port, will yield a good result.

Design Recommendations for the Power Supply

LVDS Receiver

The BCON for LVDS interface is designed to work with FPGAs as well as Channel Link deserializer devices.

For full speed operation, the FPGA must support a bit rate of at least 560 Mbit/s. The Channel Link deserializer device must support 28 bits and 84 MHz or more.

For a list of suitable Channel Link devices, see the Channel Link Design Guide.